
eth:     file format elf64-littleaarch64


Disassembly of section .init:

0000000000400480 <.init>:
  400480:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400484:	910003fd 	mov	x29, sp
  400488:	94000030 	bl	400548 <printf@plt+0x58>
  40048c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400490:	d65f03c0 	ret

Disassembly of section .plt:

00000000004004a0 <__libc_start_main@plt-0x20>:
  4004a0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4004a4:	90000090 	adrp	x16, 410000 <printf@plt+0xfb10>
  4004a8:	f947fe11 	ldr	x17, [x16, #4088]
  4004ac:	913fe210 	add	x16, x16, #0xff8
  4004b0:	d61f0220 	br	x17
  4004b4:	d503201f 	nop
  4004b8:	d503201f 	nop
  4004bc:	d503201f 	nop

00000000004004c0 <__libc_start_main@plt>:
  4004c0:	b0000090 	adrp	x16, 411000 <printf@plt+0x10b10>
  4004c4:	f9400211 	ldr	x17, [x16]
  4004c8:	91000210 	add	x16, x16, #0x0
  4004cc:	d61f0220 	br	x17

00000000004004d0 <__gmon_start__@plt>:
  4004d0:	b0000090 	adrp	x16, 411000 <printf@plt+0x10b10>
  4004d4:	f9400611 	ldr	x17, [x16, #8]
  4004d8:	91002210 	add	x16, x16, #0x8
  4004dc:	d61f0220 	br	x17

00000000004004e0 <abort@plt>:
  4004e0:	b0000090 	adrp	x16, 411000 <printf@plt+0x10b10>
  4004e4:	f9400a11 	ldr	x17, [x16, #16]
  4004e8:	91004210 	add	x16, x16, #0x10
  4004ec:	d61f0220 	br	x17

00000000004004f0 <printf@plt>:
  4004f0:	b0000090 	adrp	x16, 411000 <printf@plt+0x10b10>
  4004f4:	f9400e11 	ldr	x17, [x16, #24]
  4004f8:	91006210 	add	x16, x16, #0x18
  4004fc:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400500 <.text>:
  400500:	d280001d 	mov	x29, #0x0                   	// #0
  400504:	d280001e 	mov	x30, #0x0                   	// #0
  400508:	aa0003e5 	mov	x5, x0
  40050c:	f94003e1 	ldr	x1, [sp]
  400510:	910023e2 	add	x2, sp, #0x8
  400514:	910003e6 	mov	x6, sp
  400518:	580000c0 	ldr	x0, 400530 <printf@plt+0x40>
  40051c:	580000e3 	ldr	x3, 400538 <printf@plt+0x48>
  400520:	58000104 	ldr	x4, 400540 <printf@plt+0x50>
  400524:	97ffffe7 	bl	4004c0 <__libc_start_main@plt>
  400528:	97ffffee 	bl	4004e0 <abort@plt>
  40052c:	00000000 	.inst	0x00000000 ; undefined
  400530:	004007bc 	.inst	0x004007bc ; undefined
  400534:	00000000 	.inst	0x00000000 ; undefined
  400538:	00400888 	.inst	0x00400888 ; undefined
  40053c:	00000000 	.inst	0x00000000 ; undefined
  400540:	00400908 	.inst	0x00400908 ; undefined
  400544:	00000000 	.inst	0x00000000 ; undefined
  400548:	90000080 	adrp	x0, 410000 <printf@plt+0xfb10>
  40054c:	f947f000 	ldr	x0, [x0, #4064]
  400550:	b4000040 	cbz	x0, 400558 <printf@plt+0x68>
  400554:	17ffffdf 	b	4004d0 <__gmon_start__@plt>
  400558:	d65f03c0 	ret
  40055c:	00000000 	.inst	0x00000000 ; undefined
  400560:	b0000080 	adrp	x0, 411000 <printf@plt+0x10b10>
  400564:	9100c000 	add	x0, x0, #0x30
  400568:	b0000081 	adrp	x1, 411000 <printf@plt+0x10b10>
  40056c:	9100c021 	add	x1, x1, #0x30
  400570:	eb00003f 	cmp	x1, x0
  400574:	540000a0 	b.eq	400588 <printf@plt+0x98>  // b.none
  400578:	90000001 	adrp	x1, 400000 <__libc_start_main@plt-0x4c0>
  40057c:	f9449421 	ldr	x1, [x1, #2344]
  400580:	b4000041 	cbz	x1, 400588 <printf@plt+0x98>
  400584:	d61f0020 	br	x1
  400588:	d65f03c0 	ret
  40058c:	d503201f 	nop
  400590:	b0000080 	adrp	x0, 411000 <printf@plt+0x10b10>
  400594:	9100c000 	add	x0, x0, #0x30
  400598:	b0000081 	adrp	x1, 411000 <printf@plt+0x10b10>
  40059c:	9100c021 	add	x1, x1, #0x30
  4005a0:	cb000021 	sub	x1, x1, x0
  4005a4:	9343fc21 	asr	x1, x1, #3
  4005a8:	8b41fc21 	add	x1, x1, x1, lsr #63
  4005ac:	9341fc21 	asr	x1, x1, #1
  4005b0:	b40000a1 	cbz	x1, 4005c4 <printf@plt+0xd4>
  4005b4:	90000002 	adrp	x2, 400000 <__libc_start_main@plt-0x4c0>
  4005b8:	f9449842 	ldr	x2, [x2, #2352]
  4005bc:	b4000042 	cbz	x2, 4005c4 <printf@plt+0xd4>
  4005c0:	d61f0040 	br	x2
  4005c4:	d65f03c0 	ret
  4005c8:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4005cc:	910003fd 	mov	x29, sp
  4005d0:	f9000bf3 	str	x19, [sp, #16]
  4005d4:	b0000093 	adrp	x19, 411000 <printf@plt+0x10b10>
  4005d8:	3940c260 	ldrb	w0, [x19, #48]
  4005dc:	35000080 	cbnz	w0, 4005ec <printf@plt+0xfc>
  4005e0:	97ffffe0 	bl	400560 <printf@plt+0x70>
  4005e4:	52800020 	mov	w0, #0x1                   	// #1
  4005e8:	3900c260 	strb	w0, [x19, #48]
  4005ec:	f9400bf3 	ldr	x19, [sp, #16]
  4005f0:	a8c27bfd 	ldp	x29, x30, [sp], #32
  4005f4:	d65f03c0 	ret
  4005f8:	17ffffe6 	b	400590 <printf@plt+0xa0>
  4005fc:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  400600:	910003fd 	mov	x29, sp
  400604:	f9000fa0 	str	x0, [x29, #24]
  400608:	b90017a1 	str	w1, [x29, #20]
  40060c:	b90013a2 	str	w2, [x29, #16]
  400610:	b2407fe0 	mov	x0, #0xffffffff            	// #4294967295
  400614:	f90017a0 	str	x0, [x29, #40]
  400618:	b94017a0 	ldr	w0, [x29, #20]
  40061c:	7100001f 	cmp	w0, #0x0
  400620:	1a9f07e0 	cset	w0, ne  // ne = any
  400624:	12001c00 	and	w0, w0, #0xff
  400628:	b90017a0 	str	w0, [x29, #20]
  40062c:	b94017a0 	ldr	w0, [x29, #20]
  400630:	7100001f 	cmp	w0, #0x0
  400634:	54000080 	b.eq	400644 <printf@plt+0x154>  // b.none
  400638:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  40063c:	9124e000 	add	x0, x0, #0x938
  400640:	14000003 	b	40064c <printf@plt+0x15c>
  400644:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400648:	91250000 	add	x0, x0, #0x940
  40064c:	90000001 	adrp	x1, 400000 <__libc_start_main@plt-0x4c0>
  400650:	91252022 	add	x2, x1, #0x948
  400654:	aa0003e1 	mov	x1, x0
  400658:	aa0203e0 	mov	x0, x2
  40065c:	97ffffa5 	bl	4004f0 <printf@plt>
  400660:	b94013a0 	ldr	w0, [x29, #16]
  400664:	52800021 	mov	w1, #0x1                   	// #1
  400668:	1ac02020 	lsl	w0, w1, w0
  40066c:	2a2003e0 	mvn	w0, w0
  400670:	93407c00 	sxtw	x0, w0
  400674:	f94017a1 	ldr	x1, [x29, #40]
  400678:	8a000020 	and	x0, x1, x0
  40067c:	f90017a0 	str	x0, [x29, #40]
  400680:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400684:	91256000 	add	x0, x0, #0x958
  400688:	f94017a1 	ldr	x1, [x29, #40]
  40068c:	97ffff99 	bl	4004f0 <printf@plt>
  400690:	b94013a0 	ldr	w0, [x29, #16]
  400694:	b94017a1 	ldr	w1, [x29, #20]
  400698:	1ac02020 	lsl	w0, w1, w0
  40069c:	93407c00 	sxtw	x0, w0
  4006a0:	f94017a1 	ldr	x1, [x29, #40]
  4006a4:	aa000020 	orr	x0, x1, x0
  4006a8:	f90017a0 	str	x0, [x29, #40]
  4006ac:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  4006b0:	9125a000 	add	x0, x0, #0x968
  4006b4:	f94017a1 	ldr	x1, [x29, #40]
  4006b8:	97ffff8e 	bl	4004f0 <printf@plt>
  4006bc:	f90017bf 	str	xzr, [x29, #40]
  4006c0:	b94017a0 	ldr	w0, [x29, #20]
  4006c4:	7100001f 	cmp	w0, #0x0
  4006c8:	1a9f07e0 	cset	w0, ne  // ne = any
  4006cc:	12001c00 	and	w0, w0, #0xff
  4006d0:	b90017a0 	str	w0, [x29, #20]
  4006d4:	b94017a0 	ldr	w0, [x29, #20]
  4006d8:	7100001f 	cmp	w0, #0x0
  4006dc:	54000080 	b.eq	4006ec <printf@plt+0x1fc>  // b.none
  4006e0:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  4006e4:	9124e000 	add	x0, x0, #0x938
  4006e8:	14000003 	b	4006f4 <printf@plt+0x204>
  4006ec:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  4006f0:	91250000 	add	x0, x0, #0x940
  4006f4:	90000001 	adrp	x1, 400000 <__libc_start_main@plt-0x4c0>
  4006f8:	91252022 	add	x2, x1, #0x948
  4006fc:	aa0003e1 	mov	x1, x0
  400700:	aa0203e0 	mov	x0, x2
  400704:	97ffff7b 	bl	4004f0 <printf@plt>
  400708:	b94013a0 	ldr	w0, [x29, #16]
  40070c:	52800021 	mov	w1, #0x1                   	// #1
  400710:	1ac02020 	lsl	w0, w1, w0
  400714:	2a2003e0 	mvn	w0, w0
  400718:	93407c00 	sxtw	x0, w0
  40071c:	f94017a1 	ldr	x1, [x29, #40]
  400720:	8a000020 	and	x0, x1, x0
  400724:	f90017a0 	str	x0, [x29, #40]
  400728:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  40072c:	91256000 	add	x0, x0, #0x958
  400730:	f94017a1 	ldr	x1, [x29, #40]
  400734:	97ffff6f 	bl	4004f0 <printf@plt>
  400738:	b94013a0 	ldr	w0, [x29, #16]
  40073c:	b94017a1 	ldr	w1, [x29, #20]
  400740:	1ac02020 	lsl	w0, w1, w0
  400744:	93407c00 	sxtw	x0, w0
  400748:	f94017a1 	ldr	x1, [x29, #40]
  40074c:	aa000020 	orr	x0, x1, x0
  400750:	f90017a0 	str	x0, [x29, #40]
  400754:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400758:	9125a000 	add	x0, x0, #0x968
  40075c:	f94017a1 	ldr	x1, [x29, #40]
  400760:	97ffff64 	bl	4004f0 <printf@plt>
  400764:	d503201f 	nop
  400768:	a8c37bfd 	ldp	x29, x30, [sp], #48
  40076c:	d65f03c0 	ret
  400770:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400774:	910003fd 	mov	x29, sp
  400778:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  40077c:	9125e000 	add	x0, x0, #0x978
  400780:	d2800082 	mov	x2, #0x4                   	// #4
  400784:	528000a1 	mov	w1, #0x5                   	// #5
  400788:	97ffff5a 	bl	4004f0 <printf@plt>
  40078c:	d503201f 	nop
  400790:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400794:	d65f03c0 	ret
  400798:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  40079c:	910003fd 	mov	x29, sp
  4007a0:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  4007a4:	91266000 	add	x0, x0, #0x998
  4007a8:	528000a1 	mov	w1, #0x5                   	// #5
  4007ac:	97ffff51 	bl	4004f0 <printf@plt>
  4007b0:	d503201f 	nop
  4007b4:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4007b8:	d65f03c0 	ret
  4007bc:	a9bd7bfd 	stp	x29, x30, [sp, #-48]!
  4007c0:	910003fd 	mov	x29, sp
  4007c4:	52800020 	mov	w0, #0x1                   	// #1
  4007c8:	b9002fa0 	str	w0, [x29, #44]
  4007cc:	b9402fa0 	ldr	w0, [x29, #44]
  4007d0:	7100001f 	cmp	w0, #0x0
  4007d4:	1a9f17e0 	cset	w0, eq  // eq = none
  4007d8:	12001c00 	and	w0, w0, #0xff
  4007dc:	b9002fa0 	str	w0, [x29, #44]
  4007e0:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  4007e4:	9126a000 	add	x0, x0, #0x9a8
  4007e8:	b9402fa1 	ldr	w1, [x29, #44]
  4007ec:	97ffff41 	bl	4004f0 <printf@plt>
  4007f0:	97ffffe0 	bl	400770 <printf@plt+0x280>
  4007f4:	97ffffe9 	bl	400798 <printf@plt+0x2a8>
  4007f8:	d28000c0 	mov	x0, #0x6                   	// #6
  4007fc:	f2a00200 	movk	x0, #0x10, lsl #16
  400800:	f90013a0 	str	x0, [x29, #32]
  400804:	f94013a0 	ldr	x0, [x29, #32]
  400808:	d350fc00 	lsr	x0, x0, #16
  40080c:	f9000fa0 	str	x0, [x29, #24]
  400810:	f94013a0 	ldr	x0, [x29, #32]
  400814:	12001000 	and	w0, w0, #0x1f
  400818:	52800021 	mov	w1, #0x1                   	// #1
  40081c:	1ac02020 	lsl	w0, w1, w0
  400820:	51000400 	sub	w0, w0, #0x1
  400824:	f9400fa1 	ldr	x1, [x29, #24]
  400828:	1ac12000 	lsl	w0, w0, w1
  40082c:	93407c00 	sxtw	x0, w0
  400830:	f9000ba0 	str	x0, [x29, #16]
  400834:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400838:	9126e000 	add	x0, x0, #0x9b8
  40083c:	f9400ba3 	ldr	x3, [x29, #16]
  400840:	f9400fa2 	ldr	x2, [x29, #24]
  400844:	f94013a1 	ldr	x1, [x29, #32]
  400848:	97ffff2a 	bl	4004f0 <printf@plt>
  40084c:	f9400ba0 	ldr	x0, [x29, #16]
  400850:	92400000 	and	x0, x0, #0x1
  400854:	f9400fa1 	ldr	x1, [x29, #24]
  400858:	9ac12401 	lsr	x1, x0, x1
  40085c:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400860:	91272000 	add	x0, x0, #0x9c8
  400864:	97ffff23 	bl	4004f0 <printf@plt>
  400868:	2a0003e1 	mov	w1, w0
  40086c:	90000000 	adrp	x0, 400000 <__libc_start_main@plt-0x4c0>
  400870:	91274000 	add	x0, x0, #0x9d0
  400874:	97ffff1f 	bl	4004f0 <printf@plt>
  400878:	52800000 	mov	w0, #0x0                   	// #0
  40087c:	a8c37bfd 	ldp	x29, x30, [sp], #48
  400880:	d65f03c0 	ret
  400884:	00000000 	.inst	0x00000000 ; undefined
  400888:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  40088c:	910003fd 	mov	x29, sp
  400890:	a901d7f4 	stp	x20, x21, [sp, #24]
  400894:	90000094 	adrp	x20, 410000 <printf@plt+0xfb10>
  400898:	90000095 	adrp	x21, 410000 <printf@plt+0xfb10>
  40089c:	91374294 	add	x20, x20, #0xdd0
  4008a0:	913722b5 	add	x21, x21, #0xdc8
  4008a4:	a902dff6 	stp	x22, x23, [sp, #40]
  4008a8:	cb150294 	sub	x20, x20, x21
  4008ac:	f9001ff8 	str	x24, [sp, #56]
  4008b0:	2a0003f6 	mov	w22, w0
  4008b4:	aa0103f7 	mov	x23, x1
  4008b8:	9343fe94 	asr	x20, x20, #3
  4008bc:	aa0203f8 	mov	x24, x2
  4008c0:	97fffef0 	bl	400480 <__libc_start_main@plt-0x40>
  4008c4:	b4000194 	cbz	x20, 4008f4 <printf@plt+0x404>
  4008c8:	f9000bb3 	str	x19, [x29, #16]
  4008cc:	d2800013 	mov	x19, #0x0                   	// #0
  4008d0:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  4008d4:	aa1803e2 	mov	x2, x24
  4008d8:	aa1703e1 	mov	x1, x23
  4008dc:	2a1603e0 	mov	w0, w22
  4008e0:	91000673 	add	x19, x19, #0x1
  4008e4:	d63f0060 	blr	x3
  4008e8:	eb13029f 	cmp	x20, x19
  4008ec:	54ffff21 	b.ne	4008d0 <printf@plt+0x3e0>  // b.any
  4008f0:	f9400bb3 	ldr	x19, [x29, #16]
  4008f4:	a941d7f4 	ldp	x20, x21, [sp, #24]
  4008f8:	a942dff6 	ldp	x22, x23, [sp, #40]
  4008fc:	f9401ff8 	ldr	x24, [sp, #56]
  400900:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400904:	d65f03c0 	ret
  400908:	d65f03c0 	ret

Disassembly of section .fini:

000000000040090c <.fini>:
  40090c:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400910:	910003fd 	mov	x29, sp
  400914:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400918:	d65f03c0 	ret
